It Implements your signal processing architectures in a fully configurable processor ready for use or prove your design in a hardware plugged directly into your cPCI system.

Here are 165 k logic cells to run your algorithms and to emulate your ASIC and kill the RTL bugs before you cut masks.

Technical Specifications

FPGA:              3xVirtex 4 SX55 FF1148

Interfaces:         1xCPCI 64bit@66MHz (PLX9656), 4xRS232, 20xLVDS OUT (2.5V - 100ohm), 20xLVDS IN (2.5V - 100ohm)  64xGPIO (3.3V), 1xJTAG (FPGA)

Memory:            6x64Mb SDRAM, 1xCF (for FPGA  configuration by ACE controller)

Controls:            8 Microswitch

Power supply :   12V, 5V, 3.3V CPCI (Hotswap Compliant)

Debug:              Temperature protection  (80°C core) of FPGAs, connectors for logic analyser on the local bus PLX9656

Dimension:        Single 6U card

Computational

Power:              DSP compute performance of 768 Tera MAC/s

Optional:           Soft-core MicroBlaze of Xilinx (multiple istances) or additional inplementation of

microprocessor by  FPGA (Opencores or12k).